IBM’s Nano-Water Cooled Chips

IBM’s Nano-Water Cooled Chips
Researchers at IBM have developed a method of networking tiny pipes of water that can be used to cool next generation PC chips. Scientists at the firm have shown off a prototype device layered with thousands of hair-width cooling arteries. The design could promise further advancement along the lines of Moore’s Law in the next decade and could significantly reduce the energy consumed by data centers.





 The scanning electron micrograph shows a close-up image of the cooling layer. The so-called pin-fin cooling structure used in this test vehicle performed best in these experiments and achieved an output of 180 Watts/cm2 per layer in a stack with an area of 4 cm2. (Credit: IBM)
The scanning electron micrograph shows
a close-up image of the cooling layer.
The so-called pin-fin cooling structure
used in this test vehicle performed
best in these experiments and achieved
an output of 180 Watts/cm2 per layer
in a stack with an area of 4 cm2. (Credit: IBM)

In partnership with the Fraunhofer Institute in Berlin, the IBM team demonstrated a prototype that incorporates the cooling system into the 3-D chips by piping water directly between each layer in the stack. The 3-D processor stacks chips and memory devices that conventionally sit side-by-side on a silicon wafer and stack them together on top of one another. This feat presents one of the most innovative methods for increasing microchip performance developed in recent years.

Placing chips vertically, rather than side by side, trims down the distance data has to travel, thus improving efficiency and saving critical space. “As we package chips on top of each other, we have found that conventional coolers attached to the back of a chip don’t scale,” said Thomas Brunschwiler from IBM’s Zurich Research Laboratory. “In order to exploit the potential of high-performance 3D chip stacking, we need interlayer cooling,” he explained further.

The image shows this interlayer water cooling technique in which the cooling structures are integrated directly into the chip stack. Using a special assembly technique the layers can be connected in a high-precision and robust way that allows water to be pumped through the 3-D stack embedded in a cooling container (purple). (Credit: IBM) 
The image shows this interlayer water cooling
technique in which the cooling structures
are integrated directly into the chip stack. Using
a special assembly technique the layers can be
connected in a high-precision and robust
way that allows water to be pumped
through the 3-D stack embedded in a cooling
container (purple). (Credit: IBM)

One of the main obstacles of manufacturing smaller and faster chips is heat; it is the result of the transfer of electrons through the tiny wires linking millions of components on a modern processor. As more components are added on to chips, the problems become worse. For example, Intel only recently introduced a processor with two billion transistors. Managing the heat originating from this processor and future ones is of permanent concern to microchip manufacturers.

As a result, researchers around the world are actively looking for the most efficient way to remove heat from the chip. In 2007, US scientists developed tiny wind engines that produced a “breeze” which consisted of charged particles, or ions, to cool computer chips. However, heat dissipation problems would be aggravated in IBM’s multi-story chips which are going to be implemented in future processors.

To avoid this, researchers piped water through sealed tubes just 50 microns (millionths of a metre) in diameter, between individual layers. Water is much more effective than air at absorbing heat and with a minute measure of liquid flowing through the system, the researchers saw considerable results. Pumping liquids through computers isn’t new. Early mainframe computers had water pumped around them.

 The photo shows a complete view of a single interlayer 3-D cooling prototype before assembly. The active cooling area, the structured area in the center of the prototype, measures 1 by 1 cm, has a height of 100 microns, and contains up to 10,000 vertical interconnects (Credit: IBM)
The photo shows a complete view
of a single interlayer 3-D cooling
prototype before assembly. The active
cooling area, the structured area in the center
of the prototype, measures 1 by 1 cm,
has a height of 100 microns, and contains
up to 10,000 vertical interconnects (Credit: IBM)

Enthusiasts building high end gaming machines have also been modding their computers with water coolers and numerous researchers and companies have presented proposals for directly cooling chips with fluids. In 2003, Stanford University’s offshoot company, ‘Cooligy’ revealed its Active Micro-Channel Cooling (AMC) technology, which let fluids pass through hundreds of tiny channels on the upper shell of a chip. The technology was used in some versions of Apple’s Power Mac G5 desktop computer, released in 2004.

IBM has said its new micro water-cooling technology could reach the market within five years.

In 2007 TFOT covered another innovative processor cooling technology based on ionic wind developed by Kronos Advanced Technologies in collaboration with Intel and the University of Washington. TFOT has also previously written about the MIT team who developed an energy efficient microchip, where researchers discovered a way to significantly decrease microchip energy consumption to one tenth of the current rates. TFOT also covered the chip technology of cooler, faster, cheaper silicon chips recently developed using a new process and equipment that is expected to significantly reduce the amount of heat generated by silicon chips used for speeding processors.

Additional information of IBM’s water cooling system for 3-D chips can be found on IBM’s website.

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About the author

Anuradha Menon

Anu has a bachelor's degree in Electrical and Computer Systems Engineering from Monash University Malaysia. She is currently working as a Research Assistant at Monash. Anu has published an academic paper on robotics and artificial intelligence at MTC 2008 – IEEE International Instrumentation and Measurement Technology Conference in Victoria, Canada.

View all articles by Anuradha Menon