|This vintage photo portrays the
previous paradigm shift in electronic
memory. This is a 64 bit memory chip
from the mid 60s on top of the
industry standard at the time – core
memory (hand woven iron rings
that store a 1 or a 0 magnetically)
The new research was led by Michael Kozicki, an electrical engineering professor from Arizona State University (ASU
) and director of the Center for Applied Nanoionics. The research "opens the door to inexpensive, high-density data storage by 'stacking' memory layers on top one another inside a single chip," says Kozicki. Future applications include more portable systems, which will be more rugged and less dependent on power charging solutions.
Kozicki exhibited the new memory technology at the recent 2009 International Electron Devices and Materials Symposia
in Taiwan, which took place during last November. He worked with Sarath C. Puthen Thermadam, an ASU electrical engineering graduate student. Although this recent study is based on previous developments, the improvements shown have a much higher potential than thought before. “Two years ago we made a new type of memory that could replace Flash, using materials common to the semiconductor industry,” explains Kozicki. “What we have done now is add some critical functionality to the memory cell merely by involving another common material – silicon."
According to Kozicki, the limits of current technology are due to the physical attributes of semiconductors, which restrict the information capacity stored on a given volume. One of his ideas was to stack memory cells. This concept is similar to one's ability to store boxes in a small room: usually people will store more boxes by stacking them, taking advantage of the three dimensions of the room, rather than only putting each box on the floor. Stacking memory cells is basically the same – boxes likened to cells.
When asked why this approach wasn’t applied in the past, Kozicki says: "Before, if you joined several memory cells together you wouldn't be able to access one without accessing all of the others because they were all wired together." Therefore, the team had to find a way to isolate each cell. Now, each memory cell has a storage element and an access device; the latter allowed them to read, write or erase each storage cell individually.
The concept of using access elements existed before; however, scientists used silicon substrate – and this method has its share of problems. "If you do that for one layer of memory and then you build another layer, where will you put the access device?" Kozicki rhetorically asks. "You already used up the silicon on the first layer and it's a single crystal, it is very difficult to have multiple layers of single crystal material."
While Kozicki’s approach does use silicon, it does not use single crystal silicon, which can be deposited in layers as part of the three-dimensional memory fabrication process. The team’s effort was to build an electrical element – a diode – into the memory cell. This diode would also isolate the cells. The team’s achievement was finding an elegant way of achieving diode capability; they decided to substitute one known material for another, in this case a layer of metal was replaced with doped silicon.
"We can actually use a number of different types of silicon that can be layered," Kozicki explained. "We get away from using the substrate altogether for controlling the memory cells and put these access devices in the layers of memory above the silicon substrate." Future applications might have even more layers, he says. "Rather than having one transistor in the substrate controlling each memory cell, we have a memory cell with a built-in diode and since it is built into the cell, it will allow us to put in as many layers as we can squeeze in there."
With each layer applied, memory capacity significantly expands. Since the team clearly showed that by replacing the bottom electrode with silicon it is feasible to go any number of layers above it, the result is theoretically infinite amount of data – restricted only by the number of layers.
This development might draw the attention of many firms in the storage industry. "Stackable memory is thought to be the only way of reaching the densities necessary for the type of solid state memory that can compete with hard drives on cost as well as information storage capacity," said Kozicki. "If you had eight layers of memory in a single chip, this would give you almost eight times the density without increasing the area."
When asked to name a single, defining turnaround point in his research, Kozicki points at the diode. "The key was the diodes, and making a diode that was simple and essentially integrated in with the memory cell. Once you do that, the rest is pretty straightforward." After a moment of thought, he adds: "It turns out to be a ridiculously simple idea, but it works. It works better than the complicated ideas work."
TFOT has also covered the Flexible Memristor Chips
, engineered at the National Institute of Standards and Technology, and HP's Memristor on a Chip
, the first functioning memristor circuit, unveiled at the inaugural Memristor and Memristor Systems Symposium. Other related TFOT stories include the Phoenix Processor
, a low-power microchip which uses 30,000 times less power, and an experiment performed at the Physikalisch-Technische Bundesanstalt, Germany, which achieved New Speed Record for Magnetic Memories
For more information about ASU’s development of memory basing on stacked cells, see the university’s press release
Image icon credit: Steve Jurvetson
, Menlo Park, USA (Wikimedia Commons)